CMP Process Engineer (Mid-Senior Level)

Tempe, AZ

Kforce has a client that is seeking a CMP Process Engineer (Mid-Senior Level) in Tempe, AZ. Semiconductor Manufacturing/Fab Operations Overview: A growing small to mid-size semiconductor company is seeking a Mid-Level to Senior CMP Process Engineer to support innovative IC product development. This is an exclusive search, working directly with the hiring manager. The role partners closely with Fab Operations in a heavy R&D driven environment, balancing sustaining and process development responsibilities. Key Responsibilities:

  • Own CMP module day to day operations, including process and equipment monitoring, troubleshooting, and sustaining tool availability
  • Drive continuous improvements in yield, quality, reliability, cost, process capability, productivity, and safety
  • Design, execute, and analyze DOEs (both new and existing), applying strong statistical and problem-solving methodologies
  • Support a dynamic environment with approximately 70% sustaining and 30% development work (may vary over time)
  • Collaborate cross functionally on upstream and downstream process interactions
  • Support Copper and/or Oxide CMP processes within advanced semiconductor manufacturing
  • BS, MS, or PhD in Chemical Engineering, Materials Science, or a related engineering discipline
  • 3+ years of Fab and CMPS Process Engineering experience; 5+ years of CMP process engineering experience strongly preferred
  • Hands-on experience with Copper and/or Oxide CMP processes and related equipment
  • Strong background in SPC, FDC, defect control, and DOE methodologies (JMP preferred)
  • Experience with CMP tools such as AMAT, Ebara, IPEC, Mirra Mesa, or similar platforms
  • Familiarity with CMP metrology systems including Applied Materials Platforms, Nova in situ, UV1280, optical CD/thin film systems, SpectraShape, Aleris, Novus, or PROVision
  • Strong communication skills and ability to work effectively in cross functional teams
Nice to Have: * Experience supporting or integrating with dielectric etch processes

Posted 2026-03-27

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