Advanced FPGA Engineer for Crypto and Cross Domain Solutions

Responsibilities for this Position

Advanced FPGA Engineer for Crypto and Cross Domain Solutions

ID: 2025-68384
USA-AZ-Scottsdale
Required Clearance: Secret
Posted Date: 10/1/2025
Category: Engineering-Software
Employment Type: Full Time
Hiring Company: General Dynamics Mission Systems, Inc.

Basic Qualifications

Bachelors degree in Electrical or Computer Engineering, or a related Science, Engineering or Mathematics field, plus a minimum of 5 years of relevant experience; or Master's degree plus a minimum of 3 years of relevant experience.

CLEARANCE REQUIREMENTS: Department of Defense Secret security clearance is required at time of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information. Due to the nature of work performed within our facilities, U.S. citizenship is required.

Responsibilities for this Position

General Dynamics Mission Systems has an immediate opening for an Advanced ASIC FPGA Engineer located in Scottsdale, AZ.

D uties and Tasks:

Responsible for definition, design, verification and documentation for ASIC (Application Specific Integrated Circuit) and/or FPGA (Field Programmable Gate Array) developments

Determines architecture, system simulation and detailed design approach

Defines module interfaces and all aspects of device design and simulation

Evaluates the process flow including but not limited to high level design, synthesis, place and route, timing and power utilization

Creates test and simulation plans that establish functional criteria

Verifies test results and analyzes performance

May also review vendor capabilities, foundry technologies, device libraries and simulation tools

Participates in the improvement of the ASIC/FPGA organizational processes

Supports the generation of technical engineering products by using the appropriate standards, processes, procedures, and tools throughout the ASIC/FPGA development life cycle

Contributes to the research and analysis of data, such as customer design proposal specifications, and manuals to determine feasibility of design or application

Selects components and equipment based on analysis of specifications and reliability

May provide leadership and/or direction to lower level employees

Independently determines approach to solutions

Contributes to the completion of major programs and projects Plans and executes project tasks for activities described above

Knowledge, Skills and Abilities:

Highly proficient use and understanding of ASIC/FPGA engineering concepts, principles, and theories

Highly proficient in the principles and techniques of ASIC/FPGA design

Highly proficient understanding of ASIC/FPGA processes

Highly proficient knowledge of other related disciplines

Keeps abreast of technology trends

Highly proficient awareness of business objectives and Engineerings role in achieving

Highly proficient in Microsoft Office applications

Highly proficient in ASIC/FPGA design tools

Highly proficient written and verbal communications skills

Ability to think creatively

Ability to multi-task

Highly proficient skill in communicating issues, impacts, and corrective actions

Highly proficient ability to recognize and clearly report information relevant to sound ASIC/FPGA design

Highly proficient ability to develop and sell concepts and ideas

Regular contact with senior levels of internal work groups

Works under limited direction

Contact with project leaders and other professionals within the Engineering department and with project teams across the company

Some contact with external customers

Experience designing high speed interfaces and complex memory designs
Commitment to ongoing professional development for yourself and others
Requirements capture/specification
RTL design (VHDL or Verilog)
Simulation (testbenches, ModelSim/QuestaSim)
Synthesis (e.g., Synplify, Vivado)
Place and route (Vivado, Quartus)
Timing closure (STA, timing constraints)
Bitstream generation and device programming
Lab bring-up/debugging (e.g., ChipScope)

#CJ3

#LI-Hybrid

Salary Note

This estimate represents the typical salary range for this position based on experience and other factors (geographic location, etc.). Actual pay may vary. This job posting will remain open until the position is filled.

Combined Salary Range

USD $132,077.00 - USD $146,523.00 /Yr.

Company Overview

General Dynamics Mission Systems (GDMS) engineers a diverse portfolio of high technology solutions, products and services that enable customers to successfully execute missions across all domains of operation. With a global team of 12,000+ top professionals, we partner with the best in industry to expand the bounds of innovation in the defense and scientific arenas. Given the nature of our work and who we are, we value trust, honesty, alignment and transparency. We offer highly competitive benefits and pride ourselves in being a great place to work with a shared sense of purpose. You will also enjoy a flexible work environment where contributions are recognized and rewarded. If who we are and what we do resonates with you, we invite you to join our high-performance team!

Equal Opportunity Employer / Individuals with Disabilities / Protected Veterans

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