EDA Tools Software Engineer

EDA Tools Software Engineer Location Phoenix, AZ :

Join Intel-and build a better tomorrow. Intel is undergoing an exciting transformation, with a vision to create and extend computing technology to connect and enrich the lives of every person on Earth. So, join us-and help us create the next generation of technologies that will shape the future for decades to come.

About the team: This is EDA Tools Software Engineering position in the Custom Layout Team of the Process Design Kit (PDK) group, within the Design Enablement (DE) organization. Excellent opportunity for those who enjoy working in a fast-paced environment. Highly visible role needing good communication skills, as well as the ability to identify bottlenecks, critical paths, and develop mitigation plans to manage risk, resources, and timelines for successful PDK delivery. The custom layout team works with internal and external customers to deliver a productive design environment leveraging Intel's advanced technologies and industry standard EDA tools. About the role: The EDA Tools Software Engineer will manage the development of Custom Layout Tech for the Intel PDK on advanced nodes. The individual must operate independently and possess the relevant domain knowledge to set the team's technical direction, while collaborating with stakeholders to accomplish milestones and successfully deploy an industry-standard multi-vendor custom layout PDK. The EDA Tools Software Engineer will be in responsible for managing all internal/external customer tickets, root cause the issue, and resolve them in accordance with the PDK guidelines. The individual will act as a liaison between end users and EDA vendors, investigating and resolving customer issues, technology library and tool gaps, creating tool specifications, and driving vendor tool updates. Some key responsibilities include the following:

• Develop, test, and debug software tools, flows, and methodologies used in design automation and by teams in the design of hardware products, process design, or manufacturing.
• Deploying and testing efficiency of tools in achieving design goals and collaborating with design teams on methodology development.
• Development of automated flows involving writing efficient code in scripting languages to automatically translate Intel process technology rules and requirements into vendor specific technology library file formats.
• EDA tools SW Engineers are advocates of applying design methodologies to help execute projects effectively and successfully with high quality.

#DesignEnablement

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Experience would be obtained through a combination of education level and relevant previous job and/or internship experience. Minimum requirements:

Bachelor's degree with 4+ years of experience or Master's degree with 3+ years of experience in Electrical Engineering, Computer Engineering or related field.

4+years of industry experience is required in the following areas:

• Understanding of Custom Layout technology file constraints (Virtuoso or Custom Compiler)
• Thorough understanding of Foundry design rules and layout concepts on advanced process nodes.
• Programming skills in at least one of the following: Python, Ruby, or Tcl
• Working knowledge of the UNIX/Linux environment

Preferred Requirements:

6+ years of industry experience in the following:

• Working with EDA partners, cross-functional domains.
• Working with foundry customers.

Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art - from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth.

Other Locations

US, OR, Hillsboro; US, AZ, Phoenix; US, CA, Folsom

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here. Annual Salary Range for jobs which could be performed in US, California: $123,419.00-$185,123.00

• Salary range dependent on a number of factors including location and experience

Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

JobType

Hybrid